A1.1.6 Primary Memory
- Volatile memory: Data is lost when power is off: registers, cache, RAM.
- Non-volatile memory: Data is retained without power: ROM, SSDs, HDDs.
- Latency: Time delay between requesting and receiving data = time it tkes for data to move from source to sdestination.
- Throughput: Amount of data that can be processed per unit of time.
Memory Types
- Registers: Fastest and smallest. Built directly inside the CPU. Hold data the CPU is actively using right now. Volatile.
- L1 Cache: Fastest cache. Located inside each core. Small but very quick.First place the CPU looks after registers. Volatile.
- L2 Cache: Larger than L1, slightly slower. Also located within each core. Volatile.
- L3 Cache: Largest cache. Shared across all the cores on the chip. Slower than L1/L2 but still much faster than RAM. Volatile.
- RAM: Main working memory. Holds all running programs, the OS, and active data. Cleared on shutdown. Volatile.
- ROM: Stores BIOS/firmware for startup. Read-only during normal operation. Not part of the day-to-day hierarchy. Non-volatile.
Memory Hierarchy
| Memory | Speed | Size | Location | Volatile? |
|---|---|---|---|---|
| Register | Fastest | Smallest | Inside CPU core | Yes |
| L1 Cache | Per core | Yes | ||
| L2 Cache | Per core | Yes | ||
| L3 Cache | Shared across all cores | Yes | ||
| RAM | On motherboard | Yes | ||
| ROM | Slowest | Small | On motherboard | No |
The closer to the CPU, the faster and smaller. The further away, the slower and larger.
Cache Optimisation Techniques
- Prefetching: CPU predicts what data it will need next and loads it into cache early.
- Memory allocation: OS places data in memory locations that maximise cache hits.
- Cache replacement policies: OS decides what to evict from full cache to keep hit rates high.
Hit and Miss
- Cache hit: The CPU looks for data and finds it already in cache. Fast( no need to go to RAM).
- Cache miss: The CPU looks for data in cache but it is not there. Must fetch it from RAM (slow). The data is then loaded into cache for future use.
Prefetching
The CPU predicts what data it will need next and loads it into cache in advance. This reduces cache misses and avoids the CPU sitting idle waiting for data from RAM.
- Based on patterns - if the CPU accessed addresses 100, 102, 104, it predicts it will need 106 next.
Cache Replacement Policies
When cache is full and new data needs to be loaded, the OS or CPU must decide what to evict.
- LRU (Least Recently Used): Evict the data that has not been accessed for the longest time.
- FIFO (First In, First Out): Evict the oldest data in cache regardless of how recently it was used.
Virtual Memory
Virtual memory allows a computer to use more memory than is physically available by using part of the storage drive (HDD/SSD) as an extension of RAM.
- The OS creates the illusion of a larger address space by mapping virtual addresses to physical addresses using the MMU (Memory Management Unit).
- Each process gets its own virtual address space � it cannot see or access another process's memory. This is process isolation.
- Memory is divided into fixed-size blocks called pages. The OS keeps a page table to track which virtual page maps to which physical frame in RAM.
- When a process needs data that is not currently in RAM, the OS swaps a page from RAM out to a swap file / page file on disk, and loads the needed page in. This is called paging.
Benefits
- Allows programs larger than physical RAM to run.
- Process isolation: processes cannot accidentally corrupt each other's memory.
- More efficient use of physical RAM: inactive pages can be swapped out.