A1.1.7 � Fetch-Decode-Execute Cycle

? Back to A1.1 overview

Overview

The fundamental loop the CPU repeats to run every instruction. Also called the instruction cycle. The speed and efficiency of a CPU are largely determined by how quickly it can complete this cycle.

  • Fetch: Retrieve the instruction from memory.
  • Decode: Interpret the instruction.
  • Execute: Perform the operation.

The Clock

The FDE cycle is synchronised by the clock - a circuit that sends regular electrical pulses. Each pulse = one clock cycle. Every stage of the FDE cycle happens in sync with these pulses.

  • Clock speed measured in Hertz (Hz)
  • Faster clock = more instructions per second

The Three Phases

Fetch

  1. PC holds the address of the next instruction.
  2. Address copied from PC to MAR.
  3. CU sends a "read" signal on the control bus.
  4. Address bus carries the address from MAR to memory.
  5. Instruction returned from memory via data bus into MDR.
  6. Instruction copied from MDR to IR.
  7. PC increments to point to the next instruction.

Registers: PC -> MAR -> MDR -> IR

Decode

  1. CU reads the instruction stored in the IR.
  2. Decodes it according to the CPU instruction set.
  3. Opcode: determines the operation (ADD, SUB, JMP...).
  4. Operands: identify the data to be used.
  5. Addressing mode: specifies how to locate the operands (direct, indirect...).

Registers: IR, CU

Execute

  1. Arithmetic/logic: ALU performs the operation (ADD, SUB, AND, OR...).
  2. Memory access: LOAD moves data from memory to a register. STORE moves data from a register to memory.
  3. Control: JMP updates the PC to a new address, altering the flow of execution.
  4. Result stored in a register (Accumulator), written to memory, or used to update the PC.

Registers: ALU, AC, MAR, MDR

Buses

  • Address bus: Carries memory addresses from CPU to memory. Width limits the maximum addressable memory.
  • Data bus: Transfers data and instructions between CPU and memory. Width determines how much data can be transferred in one operation.
  • Control bus: Carries read/write signals and synchronisation signals between CPU and other components.